Common specifications: 70μm (2 oz), 105μm (3 oz), 140μm (4 oz), and up to 420μm (12 oz) in extreme scenarios.
Matching scenarios: For large current (≥5A) circuits, prefer 2–4 oz copper. For ultra-power scenarios (≥20A), select 6–12 oz copper.
Current-carrying capacity calculation:
Thick copper trace capacity must be combined with copper thickness, line width, and temperature rise requirements (usually designed for a 10℃ temperature rise).
Formula reference: I = K × W × T0.83 (I = current, K = coefficient, W = line width, T = copper thickness).
Example: 2 oz copper (70μm), wire width 5mm → current-carrying capacity ≈ 15A (at 10℃ rise).
Trace optimization:
• Keep high-current traces as short and wide as possible; avoid narrow necks (sudden width changes can cause local overheating).
• Multi-layer boards can use "parallel connection of multiple copper layers" (e.g., 2 layers of 2 oz = 4 oz equivalent) to enhance current-carrying capacity.
Vias: For high-current vias, increase hole diameter (≥0.5mm), increase the number of vias (estimated at 1A per hole), and ensure copper plating thickness on hole walls ≥20μm (vs. 8–12μm for standard PCBs).
Pads: Thick copper pads need to be enlarged (0.2–0.5mm larger than standard pads) to prevent the copper layer from dissipating heat too quickly during soldering, which may lead to false soldering.
Heat dissipation: The thick copper area can be designed as a "copper sheet heat sink," or a metallized via array (via spacing ≤1mm) can be added to connect to the heat dissipation layer.
Insulation: Wire spacing for thick copper layers should be widened (for 70μm copper, wire spacing ≥0.2mm) to prevent creepage breakdown under high voltage.
Thick copper lamination: High-temperature and high-pressure lamination (180℃ / 4MPa) is required to ensure peel strength between copper foil and substrate (≥1.2N/mm).
Thick copper etching: The etching rate is slow (approx. 1μm/min); etching time must be controlled to avoid side etching (side etching ≤0.05mm). A stepwise etching process should be adopted to reduce line width deviation.
The CTE (coefficient of thermal expansion) of thick copper layers differs significantly from the substrate. A "symmetrical structure" (consistent copper thickness between upper and lower layers) should be adopted during lamination, and a rigid support layer added to prevent PCB warping (warping degree ≤0.5%).
The surface of thick copper is prone to oxidation. It is preferred to choose tin plating (high-temperature tin layer) or nickel-gold plating; avoid OSP (incomplete organic film coverage).
The pad area needs an enlarged "solder mask opening window" to ensure proper bonding force between solder and thick copper.
The core of heavy copper PCBs is "high current-carrying capacity + heat dissipation." In design, it is necessary to match copper thickness with current-carrying capacity requirements. In manufacturing, challenges such as thick copper etching and lamination warping must be resolved. Heavy copper PCBs are best suited for high-power and high-current industrial and energy scenarios.